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 FDS8958A
January 2001
FDS8958A
Dual N & P-Channel PowerTrench MOSFET
General Description
These dual N- and P-Channel enhancement mode power field effect transistors are produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize on-state ressitance and yet maintain superior switching performance. These devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required. * *
Features
* Q1: N-Channel RDS(on) = 0.028 @ VGS = 10V RDS(on) = 0.040 @ VGS = 4.5V * Q2: P-Channel RDS(on) = 0.052 @ VGS = -10V RDS(on) = 0.080 @ VGS = -4.5V Fast switching speed High power and handling capability in a widely used surface mount package 7.0A, 30V
-5A, -30V
D1 D
D1 D
DD2 D2 D
5 6
Q2
4 3
Q1
SO-8
Pin 1 SO-8
G1 S1 S
G2 S2 G
7 8
2 1
S
S
Absolute Maximum Ratings
Symbol
VDSS VGSS ID PD Drain-Source Voltage Gate-Source Voltage
TA = 25C unless otherwise noted
Parameter
Q1
30
(Note 1a)
Q2
30 20 -5 -20 2 1.6 1 0.9 -55 to +150
Units
V V A W
- Continuous - Pulsed Power Dissipation for Dual Operation Power Dissipation for Single Operation
Drain Current
20 7 20
(Note 1a) (Note 1b) (Note 1c)
TJ, TSTG
Operating and Storage Junction Temperature Range
C
Thermal Characteristics
RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)
78 40
C/W C/W
Package Marking and Ordering Information
Device Marking FDS8958A
2001 Fairchild Semiconductor International
Device FDS8958A
Reel Size 13"
Tape width 12mm
Quantity 2500 units
FDS8958A Rev D(W)
FDS8958A
Electrical Characteristics
Symbol
BVDSS BVDSS TJ IDSS IGSSF IGSSR
TA = 25C unless otherwise noted
Parameter
Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage, Forward
Test Conditions
VGS = 0 V, ID = 250 A VGS = 0 V, ID = -250 A ID = 250 A, Referenced to 25C ID = -250 A, Referenced to 25C VDS = 24 V, VGS = 0 V VDS = -24 V, VGS = 0 V VGS = 20 V, VDS = 0 V
Type Min Typ Max Units
Q1 Q2 Q1 Q2 Q1 Q2 All All 30 -30 25 -22 1 -1 100 -100 V mV/C A nA nA
Off Characteristics
Gate-Body Leakage, Reverse VGS = -20 V, VDS = 0 V
(Note 2)
On Characteristics
VGS(th) VGS(th) TJ RDS(on)
Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance
ID(on) gFS
On-State Drain Current Forward Transconductance
VDS = VGS, ID = 250 A VDS = VGS, ID = -250 A ID = 250 A, Referenced to 25C ID = -250 A, Referenced to 25C VGS = 10 V, ID = 7 A VGS = 10 V, ID = 7 A, TJ = 125C VGS = 4.5 V, ID = 6 A VGS = -10 V, ID = -5 A VGS = -10 V, ID = -5 A, TJ = 125C VGS = -4.5 V, ID = -4 A VGS = 10 V, VDS = 5 V VGS = -10 V, VDS = -5 V VDS = 5 V, ID = 7 A VDS = -5 V, ID =-5 A Q1 VDS = 10 V, VGS = 0 V, f = 1.0 MHz
Q1 Q2 Q1 Q2 Q1
1 -1
1.6 -1.7 -4.3 4 21 32 27 41 58 58
3 -3
V mV/C
28 42 40 52 78 80
m
Q2
Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2
20 -20 19 11 789 690 173 306 66 77
A S
Dynamic Characteristics
Ciss Coss Crss Input Capacitance Output Capacitance Q2 Reverse Transfer Capacitance VDS = -10 V, VGS = 0 V, f = 1.0 MHz pF pF pF
FDS8958A Rev D(W)
Electrical Characteristics
Symbol Parameter
(continued)
TA = 25C unless otherwise noted
Test Conditions
(Note 2)
Type Min
Typ
Max Units
Switching Characteristics
td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge
Q1 VDD = 10 V, ID = 1 A, VGS = 10V, RGEN = 6 Q2 VDD = -10 V, ID = -1 A, VGS = -10V, RGEN = 6 Q1 VDS = 15 V, ID = 7 A, VGS = 10 V Q2 VDS = -15 V, ID = -5 A,VGS = -10 V
Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2
2.2 6.7 7.5 9.7 11.8 19.8 3.7 12.3 16 14 2.5 2.4 2.6 4.8
4.4 13.4 15 19.4 21.3 35.6 7.4 22.2 26 23
ns ns ns ns nC nC nC
Drain-Source Diode Characteristics and Maximum Ratings
IS VSD Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward VGS = 0 V, IS = 1.3 A Voltage VGS = 0 V, IS = -1.3 A
(Note 2) (Note 2)
0.74 -0.76
1.3 -1.3 1.2 -1.2
A V
Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design.
a) 78/W when mounted on a 2 0.5 in pad of 2 oz copper
b) 125/W when mounted on a .02 in2 pad of 2 oz copper
c) 135/W when mounted on a minimum pad.
Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%
FDS8958A Rev D(W)
FDS8958A
Typical Characteristics: Q1
30 VGS = 10V 7.0V 5.0V 20 4.5V 4.0V 3.5V
2.4 2.2 2.0 1.8 1.6 3.0V 1.4 1.2 2.5V 1.0 0.8 0 1 2 3 4 5 0 6 12 18 24 30 3.5V 4.0V 4.5V 5.0V 6.0V 7.0V 10V VGS = 3.0V
10
0
VDS, DRAIN-SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.
0.09
1.9
ID = 7A VGS = 10V
0.08 0.07 0.06 0.05 TA = 125 C
o
ID = 7A
1.6
1.3
1.0
0.04 0.03 0.02 TA = 25 C
o
0.7
0.4 -50 -25 0 25 50 75 100
o
0.01 125 150 2 4 6 8 10 TJ, JUNCTION TEMPERATURE ( C) VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with Temperature.
30 VDS = 10V 25 20 125 C 15
o o
Figure 4. On-Resistance Variation with Gate-to-Source Voltage.
100 VGS = 0V
TA = -55 C
25 C
o
10 TA = 125 C 1 25 C 0.1
o o
10 0.01 5 0 1 2 3 4 5 0.001 0 0.2 0.4 0.6 0.8 1 1.2 1.4 -55 C
o
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.
FDS8958A Rev D(W)
FDS8958A
Typical Characteristics: Q1
10 ID =7A 8 15V 6 VDS = 5V 10V
1200 f = 1MHz VGS = 0 V 900 CISS
600 4 300 2
COSS CRSS
0 0 4 8 Qg, GATE CHARGE (nC) 12 16
0 0.0 5.0 10.0 15.0 20.0
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
100 RDS(ON) LIMIT 100s 1ms 10ms 100ms 1 VGS = 10V SINGLE PULSE RJA = 135 C/W TA = 25 C 0.01 0.1 1 10 100 0
o o
Figure 8. Capacitance Characteristics.
50 SINGLE PULSE RJA = 135C/W TA = 25C
40
10
30
1s 10s DC 20
0.1
10
0.001
0.01
0.1
1 t1, TIME (sec)
10
100
1000
VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power Dissipation.
FDS8958A Rev D(W)
FDS8958A
Typical Characteristics Q2
30 VGS = -10.0V 25 20 15 10 5 0 0 1 2 3 4 5 -3.5V -7.0V -5.0V -6.0V -4.0V
2.5 VGS = -3.5V 2 -4.0V -4.5V 1.5 -5.0V -6.0V -7.0V 1 -3.0V -10.0V
0.5 0 6 12 18 24 30 -ID, DRAIN CURRENT (A)
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 11. On-Region Characteristics.
Figure 12. On-Resistance Variation with Drain Current and Gate Voltage.
0.2
1.6 ID = -5A VGS = -10V
ID = -5A
1.4
0.15 1.2 0.1 1.0 0.05 0.8 TA = 125 C TA = 25 C
o o
0.6 -50 -25 0 25 50 75 100
o
0 125 150 2 4 6 8 10
TJ, JUNCTION TEMPERATURE ( C)
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 13. On-Resistance Variation with Temperature.
30 VDS = -10V 25 20 15 125 C 10 5 0 1.5 2.5 3.5 4.5 5.5
o
Figure 14. On-Resistance Variation with Gate-to-Source Voltage.
100
TA = -55 C 10 25 C 1
o
o
VGS = 0V
TA = 125 C 25 C
o
o
0.1
-55 C
o
0.01
0.001 0 0.2 0.4 0.6 0.8 1 1.2 1.4
-VGS, GATE TO SOURCE VOLTAGE (V)
-VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 15. Transfer Characteristics.
Figure 16. Body Diode Forward Voltage Variation with Source Current and Temperature.
FDS8958A Rev D(W)
FDS8958A
Typical Characteristics Q2
10 ID = -5.3A VDS = -5V 8 -15V 6 -10V
1000
f = 1 MHz VGS = 0 V CISS
800
600
4
400
COSS
2
200 CRSS 0 0 5 10 15 0 5 10 15 20 Qg, GATE CHARGE (nC)
0
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 17. Gate Charge Characteristics.
100 RDS(ON) LIMIT 10 1ms 100 s 10ms 100ms 1s 1 DC 0.1 VGS = -10V SINGLE PULSE RJA = 135 C/W TA = 25 C 0.01 0.1 1 10 100 0
o o
Figure 18. Capacitance Characteristics.
50 SINGLE PULSE RJA = 135C/W TA = 25C
40
30
10s 20
10
0.001
0.01
0.1
1
10
100
-VDS, DRAIN-SOURCE VOLTAGE (V)
t1, TIME (sec)
Figure 19. Maximum Safe Operating Area.
Figure 20. Single Pulse Maximum Power Dissipation.
1
D = 0.5 0.2
RJA(t) = r(t) + RJA
0.1 0.05 0.02 0.01 SINGLE PULSE
0.1
RJA = 135 C/W P(pk) t1 t2 TJ - TA = P * RJA(t) Duty Cycle, D = t1 / t2
o
0.01
0.001 0.0001 0.001 0.01 0.1 t1, TIME (sec) 1 10 100 1000
Figure 21. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design.
FDS8958A Rev D(W)
SOIC-8 Tape and Reel Data
SOIC(8lds) Packaging Configuration: Figure 1.0
Packaging Description:
EL ECT ROST AT IC SEN SIT IVE DEVICES
DO NO T SHI P OR STO RE N EAR ST RO NG EL ECT ROST AT IC EL ECT RO M AGN ETI C, M AG NET IC O R R ADIO ACT IVE FI ELD S
TNR D ATE PT NUMB ER PEEL STREN GTH MIN ___ __ ____ __ ___gms MAX ___ ___ ___ ___ _ gms
Antistatic Cover Tape
ESD Label
SOIC-8 parts are shipped in tape. The carrier tape is made from a dissipative (carbon filled) polycarbonate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped with 2,500 units per 13" or 330cm diameter reel. The reels are dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 500 units per 7" or 177cm diameter reel. This and some other options are further described in the Packaging Information table. These full reels are individually barcode labeled and placed inside a standard intermediate box (illustrated in figure 1.0) made of recyclable corrugated brown paper. One box contains two reels maximum. And these boxes are placed inside a barcode labeled shipping box which comes in different sizes depending on the number of parts shipped.
Static Dissipative Embossed Carrier Tape
F63TNR Label
Customized Label
F852 NDS 9959
F852 NDS 9959
F852 NDS 9959
F852 NDS 9959
F852 NDS 9959
SOIC (8lds) Packaging Information
Pin 1
D84Z
TNR
500
Packaging Option
Packaging type
Qty per Reel/Tube/Bag
Standard (no flow code) TNR
2,500
L86Z
Rail/Tube
95
F011
TNR
4,000
SOIC-8 Unit Orientation
Reel Size
Box Dimension (mm)
Max qty per Box
Weight per unit (gm)
Weight per Reel (kg)
13" Dia
343x64x343
5,000
0.0774
0.6060
530x130x83
30,000
0.0774
-
13" Dia
343x64x343
8,000
0.0774
0.9696
7" Dia
184x187x47
1,000
0.0774
0.1182
Note/Comments
343mm x 342mm x 64mm Standard Intermediate box ESD Label
F63TNR Label sample
LOT: CBVK741B019 FSID: FDS9953A QTY: 2500 SPEC:
F63TNLabel
F63TN Label
ESD Label
(F63TNR)3
D/C1: D9842 D/C2:
QTY1: QTY2:
SPEC REV: CPN: N/F: F
SOIC(8lds) Tape Leader and Trailer Configuration: Figure 2.0
Carrier Tape Cover Tape
Components Trailer Tape 640mm minimum or 80 empty pockets Leader Tape 1680mm minimum or 210 empty pockets
(c)2000 Fairchild Semiconductor International
July 1999, Rev. B
SOIC-8 Tape and Reel Data, continued
SOIC(8lds) Embossed Carrier Tape Configuration: Figure 3.0
T E1
P0
D0
F K0 Wc B0 E2 W
Tc A0 P1 D1
User Direction of Feed
Dimensions are in millimeter Pkg type SOIC(8lds) (12mm)
A0
6.50 +/-0.10
B0
5.30 +/-0.10
W
12.0 +/-0.3
D0
1.55 +/-0.05
D1
1.60 +/-0.10
E1
1.75 +/-0.10
E2
10.25 min
F
5.50 +/-0.05
P1
8.0 +/-0.1
P0
4.0 +/-0.1
K0
2.1 +/-0.10
T
0.450 +/0.150
Wc
9.2 +/-0.3
Tc
0.06 +/-0.02
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481 rotational and lateral movement requirements (see sketches A, B, and C).
20 deg maximum Typical component cavity center line
0.5mm maximum
B0 20 deg maximum component rotation
0.5mm maximum
Sketch A (Side or Front Sectional View)
Component Rotation
A0 Sketch B (Top View)
Typical component center line
Sketch C (Top View)
Component lateral movement
SOIC(8lds) Reel Configuration: Figure 4.0
Component Rotation
W1 Measured at Hub
Dim A Max
Dim A max
Dim N
See detail AA
7" Diameter Option
B Min Dim C See detail AA W3
Dim D min
13" Diameter Option
W2 max Measured at Hub DETAIL AA
Dimensions are in inches and millimeters
Tape Size
12mm
Reel Option
7" Dia
Dim A
7.00 177.8 13.00 330
Dim B
0.059 1.5 0.059 1.5
Dim C
512 +0.020/-0.008 13 +0.5/-0.2 512 +0.020/-0.008 13 +0.5/-0.2
Dim D
0.795 20.2 0.795 20.2
Dim N
2.165 55 7.00 178
Dim W1
0.488 +0.078/-0.000 12.4 +2/0 0.488 +0.078/-0.000 12.4 +2/0
Dim W2
0.724 18.4 0.724 18.4
Dim W3 (LSL-USL)
0.469 - 0.606 11.9 - 15.4 0.469 - 0.606 11.9 - 15.4
12mm
13" Dia
(c) 1998 Fairchild Semiconductor Corporation
July 1999, Rev. B
SOIC-8 Package Dimensions
SOIC-8 (FS PKG Code S1)
1:1
Scale 1:1 on letter size paper
Dimensions shown below are in: inches [millimeters]
Part Weight per unit (gram): 0.0774
9
(c)2000 Fairchild Semiconductor International
September 1998, Rev. A
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM BottomlessTM CoolFETTM CROSSVOLTTM DOMETM E2CMOSTM EnSignaTM FACTTM FACT Quiet SeriesTM FAST
DISCLAIMER
FASTrTM GlobalOptoisolatorTM GTOTM HiSeCTM ISOPLANARTM MICROWIRETM OPTOLOGICTM OPTOPLANARTM PACMANTM POPTM
PowerTrench QFETTM QSTM QT OptoelectronicsTM Quiet SeriesTM SILENT SWITCHER SMART STARTTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8
SyncFETTM TinyLogicTM UHCTM VCXTM
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. G


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